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[IEEE 2012 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2012.02.19-2012.02.23)] 2012 IEEE International Solid-State Circuits Conference - A 1.2V 23nm 6F2 4Gb DDR3 SDRAM with local-bitline sense amplifier, hybrid LIO sense amplifier and dummy-less array architecture

✍ Scribed by Lim, Kyu-Nam; Jang, Woong-Ju; Won, Hyung-Sik; Lee, Kang-Yeol; Kim, Hyungsoo; Kim, Dong-Whee; Cho, Mi-Hyun; Kim, Seung-Lo; Kang, Jong-Ho; Park, Keun-Woo; Jeong, Byung-Tae

Book ID: 111876956
Publisher: IEEE
Year: 2012
Weight: 626 KB
Volume: 0
Category: Article
ISBN: 1467303755
DOI: 10.1109/isscc.2012.6176870

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