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[IEEE 2011 International Semiconductor Device Research Symposium (ISDRS) - College Park, MD, USA (2011.12.7-2011.12.9)] 2011 International Semiconductor Device Research Symposium (ISDRS) - A combinational logic optimization for majority gate-based nanoelectronic circuits based on GA

✍ Scribed by Roohi, A.; Kamrani, M.; Sayedsalehi, S.; Navi, K.

Book ID: 118213786
Publisher: IEEE
Year: 2011
Weight: 333 KB
Volume: 0
Category: Article
ISBN: 1457717557
DOI: 10.1109/isdrs.2011.6135290

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