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[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - A Fault Tolerant Hierarchical Network on Chip Router Architecture

✍ Scribed by Neishaburi, M.H.; Zilic, Zeljko

Book ID: 121201341
Publisher: IEEE
Year: 2011
Weight: 605 KB
Category: Article
ISBN: 1457717131
DOI: 10.1109/DFT.2011.12

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