𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Route-Aware Task Mapping Method for Fault-Tolerant 2D-Mesh Network-on-Chips

✍ Scribed by Kutami, Hiroshi; Fukushima, Yusuke; Fukushi, Masaru; Yairi, Ikuko Eguchi; Hattori, Takeshi

Book ID: 120999159
Publisher: IEEE
Year: 2011
Weight: 810 KB
Category: Article
ISBN: 1457717131
DOI: 10.1109/DFT.2011.61

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - A Fault Tolerant Hierarchical Network on Chip Router Architecture

✍ Neishaburi, M.H.; Zilic, Zeljko 📂 Article 📅 2011 🏛 IEEE ⚖ 605 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - A Reliability-Aware Partitioner for Multi-FPGA Platforms

✍ Bolchini, Cristiana; Sandionigi, Chiara 📂 Article 📅 2011 🏛 IEEE ⚖ 362 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - A Probabilistic Approach to Diagnose SETs

✍ Gangadhar, Sreenivas; Tragoudas, Spyros 📂 Article 📅 2011 🏛 IEEE ⚖ 149 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - A Soft Error Tolerance Estimation Method for Sequential Circuits

✍ Yoshimura, Masayoshi; Akamine, Yusuke; Matsunaga, Yusuke 📂 Article 📅 2011 🏛 IEEE ⚖ 272 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - Impact of Aging Phenomena on Soft Error Susceptibility

✍ Rossi, Daniele; Omaña, Martin; Metra, Cecilia; Paccagnella, Alessandro 📂 Article 📅 2011 🏛 IEEE ⚖ 775 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Vancouver, BC, Canada (2011.10.3-2011.10.5)] 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - An Area Effective Parity-Based Fault Detection Technique for FPGAs

✍ Nazar, Gabriel L.; Carro, Luigi 📂 Article 📅 2011 🏛 IEEE ⚖ 383 KB