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[IEEE 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) - Hanzhou (2011.12.12-2011.12.14)] 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) - PCB trace modeling and equalizer design method for 10 Gbps backplane

✍ Scribed by Muraoka, S.; Shinkai, G.; Yagyu, M.; Uematsu, Y.; Ogihara, M.; Sezaki, N.; Osaka, H.

Book ID: 115489223
Publisher: IEEE
Year: 2011
Weight: 898 KB
Category: Article
ISBN: 146732289X
DOI: 10.1109/edaps.2011.6213769

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