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[IEEE 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) - Hanzhou (2011.12.12-2011.12.14)] 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) - Nonlinear block latency insertion method for fast simulation of strongly coupled network with CMOS inverters

✍ Scribed by Hizawa, Y.; Kurobe, H.; Sekine, T.; Asai, H.

Book ID: 111963870
Publisher: IEEE
Year: 2011
Weight: 353 KB
Category: Article
ISBN: 146732289X
DOI: 10.1109/edaps.2011.6213772

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