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[IEEE 2010 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) - Kyoto, Japan (2010.10.6-2010.10.8)] 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems - Analog Design for a Power Transmission Line Sensing and Analysis VLSI Chip

✍ Scribed by MacLean, E.; Jain, V. K.

Book ID: 120507810
Publisher: IEEE
Year: 2010
Weight: 672 KB
Category: Article
ISBN: 1424484472
DOI: 10.1109/DFT.2010.58

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