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[IEEE 2009 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT) - Hsinchu, Taiwan (2009.08.31-2009.09.2)] 2009 IEEE International Workshop on Memory Technology, Design, and Testing - Three-Transistor DRAM-Based Content Addressable Memory Design for Reliability and Area Efficiency

✍ Scribed by Hsu, Wei-Ning; Wu, Tsu-Hsin; Huang, Tsung-Chu

Book ID: 127173491
Publisher: IEEE
Year: 2009
Tongue: English
Weight: 690 KB
Edition: Illustrated
Category: Article
ISBN: 0769537979
DOI: 10.1109/mtdt.2009.17

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