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[IEEE 2009 IEEE International Solid-State Circuits Conference (ISSCC 2009) - San Francisco, CA (2009.02.8-2009.02.12)] 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers - 1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture

✍ Scribed by Yongsam Moon, ; Yong-Ho Cho, ; Hyun-Bae Lee, ; Byung-Hoon Jeong, ; Seok-Hun Hyun, ; Byung-Chul Kim, ; In-Chul Jeong, ; Seong-Young Seo, ; Jun-Ho Shin, ; Seok-Woo Choi, ; Ho-Sung Song, ; Jung-Hwan Choi, ; Kye-Hyun Kyung, ; Young-Hyun Jun, ; Kinam Kim,

Book ID: 125834836
Publisher: IEEE
Year: 2009
Weight: 757 KB
Category: Article
ISBN: 1424434580
DOI: 10.1109/ISSCC.2009.4977341

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