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High-speed area-efficient multiplier design using multiple-valued current-mode circuits

✍ Scribed by Kawahito, S.; Ishida, M.; Nakamura, T.; Kameyama, M.; Higuchi, T.

Book ID: 119772112
Publisher: IEEE
Year: 1994
Tongue: English
Weight: 884 KB
Volume: 43
Category: Article
ISSN: 0018-9340
DOI: 10.1109/12.250607

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