Soft defect impact on electrical characteristics is becoming a key issue for device analysis after reliability test as well as for products coming back from the field. Simulating the effect of defects plays a key role. Unfortunately, the complexity of the devices induces a long simulation time, whil
Fault simulation for general FCMOS ICs
✍ Scribed by M. Favalli; P. Olivo; B. Riccò; F. Somenzi
- Publisher
- Springer US
- Year
- 1991
- Tongue
- English
- Weight
- 658 KB
- Volume
- 2
- Category
- Article
- ISSN
- 0923-8174
No coin nor oath required. For personal study only.
✦ Synopsis
This work presents a technique to correctly deal with non-stuck-at faults in FCMOS circuits making use of complex macrogates. This method can be applied to any gate-level fault simulator providing, for each line of the circuit, the observability status that is directly related to that of individual devices in the actual macrogate implementation. Conductance conflicts are correctly solved to detect bridgings and transistors stuck-on. Fault coverage results are presented and discussed for two typical FCMOS circuits. Results obtained on all ISCAS benchmarks show that the time required for the fault simulation of CMOS faults is comparable to that of stuck-ats.
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