𝔖 Bobbio Scriptorium
✦   LIBER   ✦

dRAM design using the taper-isolated dynamic RAM cell

✍ Scribed by Leiss, J.E.; Chatterjee, P.K.; Holloway, T.C.


Book ID
114594077
Publisher
IEEE
Year
1982
Tongue
English
Weight
924 KB
Volume
29
Category
Article
ISSN
0018-9383

No coin nor oath required. For personal study only.


πŸ“œ SIMILAR VOLUMES


New design method for tapered buffer cir
✍ Shigeyoshi Watanabe πŸ“‚ Article πŸ“… 2004 πŸ› John Wiley and Sons 🌐 English βš– 682 KB

## Abstract A new design method has been conceived for a buffer circuit using TIS. In the buffer circuit of a taper type with a fan‐out of 3 intended for driving a large load capacitance, a new design procedure is conceived that minimizes the pattern area without sacrificing characteristics such as