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High-performance cell transistor design using metallic shield embedded shallow trench isolation (MSE-STI) for Gbit generation DRAM's

✍ Scribed by Jai-Hoon Sim; Jae-Kyu Lee; Kinam Kim


Book ID
114537749
Publisher
IEEE
Year
1999
Tongue
English
Weight
253 KB
Volume
46
Category
Article
ISSN
0018-9383

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