Doubling speed using strained Si/SiGe CMOS technology
β Scribed by Sarah H. Olsen; Matthew Temple; Anthony G. O'Neill; Douglas J. Paul; Sanatan Chattopadhyay; Kelvin S.K. Kwa; Luke S. Driscoll
- Book ID
- 108289016
- Publisher
- Elsevier Science
- Year
- 2006
- Tongue
- English
- Weight
- 174 KB
- Volume
- 508
- Category
- Article
- ISSN
- 0040-6090
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π SIMILAR VOLUMES
## Abstract This paper demonstrates the divideβbyβ4/5 prescalers with merged AND gates in 2βΞΌm GaInP/GaAs heterojunction bipolar transistor (HBT) and 0.35βΞΌm SiGe HBT technologies. By biasing the HBT near the peak transitβtime frequency (f~T~), the maximum operating frequency of a Dβtype flipβflop
The control and characterisation of wafer defect and strain distributions is of crucial importance for the development of advanced Ultra Large Scale Integration (ULSI) circuits. Within the IC manufacturing sector 0.35 mm linewidth-based advanced Complementary Metal Oxide Semiconductor (CMOS) logic h