High-speed divide-by-4/5 prescalers with merged and gates using GaInP/GaAs HBT and SiGe HBT technologies
✍ Scribed by Hung-Ju Wei; Chinchun Meng; YuWen Chang; Yi-Chen Lin; Guo-Wei Huang
- Publisher
- John Wiley and Sons
- Year
- 2008
- Tongue
- English
- Weight
- 224 KB
- Volume
- 50
- Category
- Article
- ISSN
- 0895-2477
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✦ Synopsis
Abstract
This paper demonstrates the divide‐by‐4/5 prescalers with merged AND gates in 2‐μm GaInP/GaAs heterojunction bipolar transistor (HBT) and 0.35‐μm SiGe HBT technologies. By biasing the HBT near the peak transit‐time frequency (f~T~), the maximum operating frequency of a D‐type flip‐flop can be promoted. At the supply voltage of 5 V, the GaInP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher‐speed performance of 1–8 GHz at the cost of power consumption. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 1498–1500, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23407