✦ LIBER ✦

Design of testable VLSI circuits with minimum area overhead

✍ Scribed by Chalasani, P.R.; Bhawmik, S.; Acharya, A.; Palchaudhuri, P.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Design of pseudoexhaustive testable PLA

✍ Shen, W.-Z.; Hwang, G.-H.; Hsu, W.-J.; Jan, Y.-J. 📂 Article 📅 1993 🏛 IEEE 🌐 English ⚖ 555 KB

Development of tests for VLSI circuit te

✍ L. A. Zolotorevich; A. V. Il’inkova 📂 Article 📅 2010 🏛 SP MAIK Nauka/Interperiodica 🌐 English ⚖ 178 KB

Min-cut partitioning with functional rep

✍ Wai-Kei Mak 📂 Article 📅 2002 🏛 IEEE 🌐 English ⚖ 319 KB

Critical area analysis for design-based

✍ Doris Schmitt-Landsiedel; Doris Keitel-Schulz; Jitendra Khare; Susanne Griep; Wo 📂 Article 📅 1995 🏛 John Wiley and Sons 🌐 English ⚖ 444 KB

A testable design of programmable logic

✍ K.K. Saluja; H. Fujiwara; K. Kinoshita 📂 Article 📅 1987 🏛 Elsevier Science 🌐 English ⚖ 745 KB

[IEEE Comput. Soc 14th International Con

✍ Das, D.K.; Bhattacharya, B.B.; Ohtake, S.; Fujiwara, H. 📂 Article 📅 2001 🏛 IEEE Comput. Soc ⚖ 563 KB