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Design of on-chip error correction systems for multilevel NOR and NAND flash memories

✍ Scribed by Sun, F.; Devarajan, S.; Rose, K.; Zhang, T.

Book ID: 114442441
Publisher: The Institution of Engineering and Technology
Year: 2007
Tongue: English
Weight: 578 KB
Volume: 1
Category: Article
ISSN: 1751-858X
DOI: 10.1049/iet-cds:20060275

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