✦ LIBER ✦

Design of a Bufferless Photonic Clos Network-on-Chip Architecture

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A networks-on-chip architecture design s

✍ Peng Liu; Bingjie Xia; Chunchang Xiang; Xiaohang Wang; Weidong Wang; Qingdong Ya 📂 Article 📅 2009 🏛 Elsevier Science 🌐 English ⚖ 910 KB

Design of Network-on-Chip Architectures

✍ Leary, G.; Srinivasan, K.; Mehta, K.; Chatha, K.S. 📂 Article 📅 2009 🏛 IEEE 🌐 English ⚖ 852 KB

A Layer-Multiplexed 3D On-Chip Network A

✍ Sunkam Ramanujam, R.; Lin, B. 📂 Article 📅 2009 🏛 Institute of Electrical and Electronics Engineers 🌐 English ⚖ 275 KB

PMCNOC: A Pipelining Multi-channel Centr

✍ N. Wang; A. Sanusi; P. Y. Zhao; M. Elgamel; M. A. Bayoumi 📂 Article 📅 2009 🏛 Springer US 🌐 English ⚖ 600 KB

Using constraint programming for the des

✍ Demiriz, Ayhan; Bagherzadeh, Nader; Alhussein, Abdulaziz 📂 Article 📅 2013 🏛 Springer Vienna 🌐 English ⚖ 252 KB

Architecture of the Scalable Communicati

✍ llitzky, D.A.; Hoffman, J.D.; Chun, A.; Esparza, B.P. 📂 Article 📅 2007 🏛 IEEE 🌐 English ⚖ 1019 KB