๐”– Bobbio Scriptorium
โœฆ   LIBER   โœฆ

Design for High Performance, Low Power, and Reliable 3D Integrated Circuits || Multi-objective Architectural Floorplanning for 3D IC

โœ Scribed by Lim, Sung Kyu


Book ID
121004959
Publisher
Springer New York
Year
2012
Tongue
English
Weight
638 KB
Edition
2012
Category
Article
ISBN
1441995420

No coin nor oath required. For personal study only.

โœฆ Synopsis


This book provides readers with a variety of algorithms and software tools, dedicated to the physical design of through-silicon-via (TSV) based, three-dimensional integrated circuits. It describes numerous โ€œmanufacturing-readyโ€ GDSII-level layouts of TSV-based 3D ICs developed with the tools covered in the book. This book will also feature sign-off level analysis of timing, power, signal integrity, and thermal analysis for 3D IC designs. Full details of the related algorithms will be provided so that the readers will be able not only to grasp the core mechanics of the physical design tools, but also to be able to reproduce and improve upon the results themselves. This book will also offer various design-for-manufacturability (DFM), design-for-reliability (DFR), and design-for-testability (DFT) techniques that are considered critical to the physical design process.


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Design for High Performance, Low Power,
โœ Lim, Sung Kyu ๐Ÿ“‚ Article ๐Ÿ“… 2012 ๐Ÿ› Springer New York ๐ŸŒ English โš– 1015 KB

This book provides readers with a variety of algorithms and software tools, dedicated to the physical design of through-silicon-via (TSV) based, three-dimensional integrated circuits. It describes numerous โ€œmanufacturing-readyโ€ GDSII-level layouts of TSV-based 3D ICs developed with the tools covered