Design and Test Technology for Dependable Systems-on-Chip

✍ Scribed by Ubar, Raimund; Raik, Jaan; Vierhaus, Heinrich Theodor

• Publisher: IGI Global
• Year: 2011
• Leaves: 579
• Category: Library

✦ Synopsis

Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined “classical” design and test topics and solutions for IC test technology and fault-tolerant systems.
Content:
Front Matter
• Preface
• Table of Contents
•Section 1. Design, Modeling and Verification
1. System-Level Design of NoC-Based Dependable Embedded Systems
2. Synthesis of Flexible Fault-Tolerant Schedules for Embedded Systems with Soft and Hard Timing Constraints
3. Optimizing Fault Tolerance for Multi-Processor System-on-Chip
4. Diagnostic Modeling of Digital Systems with Multi-Level Decision Diagrams
5. Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis
•Section 2. Faults, Compensation and Repair
6. Advanced Technologies for Transient Faults Detection and Compensation
7. Memory Testing and Self-Repair
8. Fault-Tolerant and Fail-Safe Design Based on Reconfiguration
9. Self-Repair Technology for Global Interconnects on SoCs
10. Built-In Self Repair for Logic Structures
11. Self-Repair by Program Reconfiguration in VLIW Processor Architectures
•Section 3. Fault Simulation and Fault Injection
12. Fault Simulation and Fault Injection Technology Based on SystemC
13. High-Level Decision Diagram Simulation for Diagnosis and Soft-Error Analysis
14. High-Speed Logic Level Fault Simulation
•Section 4. Test Technology for Systems-on-Chip
15. Software-Based Self-Test of Embedded Microprocessors
16. SoC Self Test Based on a Test-Processor
17. Delay Faults Testing
18. Low Power Testing
19. Thermal-Aware SoC Test Scheduling
•Section 5. Test Planning, Compression and Application in SoCs
20. Study on Combined Test-Data Compression and Test Planning for Testing of Modular SoCs
21. Reduction of the Transferred Test Data Amount
22. Sequential Test Set Compaction in LFSR Reseeding
• Compilation of References
• About the Contributors
Index