Design and optimization of a low-power a
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Boualem Djezzar
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Article
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1998
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Elsevier Science
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English
โ 432 KB
The low-power and very-high-performance 0.25/~m vertical pnp bipolar process is designed and characterized by using the mixed two-dimensional numerical device/circuit simulator (CODECS). This pnp transistor has a 25 nmwide emitter, a 38 nm-wide base region, a current gain of 17 (without poly-Si emkt