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Design and analysis of a jitter-free clock recovery scheme for QAM systems

✍ Scribed by D'Andrea, N.A.; Luise, M.


Book ID
117860883
Publisher
IEEE
Year
1993
Tongue
English
Weight
351 KB
Volume
41
Category
Article
ISSN
0090-6778

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## Abstract Recent advances in high‐speed acquisition of MR signals demand higher levels of performance from RF receiver chain. High‐performance ADCs require a highly stable clock in terms of short‐term changes defined by the jitter specification. In this note, we propose a theory for the estimatio