✦ LIBER ✦
Low-jitter design method based on n-domain jitter analysis for 10 Gbit/s clock and data recovery ICs
✍ Scribed by Kishine, K.; Inaba, H.; Nakamura, Ma.; Nakamura, Mi.; Ohtomo, Y.; Onodera, H.
- Book ID
- 120170830
- Publisher
- The Institution of Electrical Engineers
- Year
- 2009
- Tongue
- English
- Weight
- 180 KB
- Volume
- 45
- Category
- Article
- ISSN
- 0013-5194
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