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Delay Estimation and Sizing of CMOS Logic Using Logical Effort With Slope Correction

✍ Scribed by Wang, C.C.; Markovic, D.

Book ID: 115506613
Publisher: Institute of Electrical and Electronics Engineers
Year: 2009
Tongue: English
Weight: 223 KB
Volume: 56
Category: Article
ISSN: 1549-7747
DOI: 10.1109/tcsii.2009.2024245

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