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Bottleneck removal algorithm for dynamic compaction in sequential circuits

โœ Scribed by Chakradhar, S.T.; Raghunathan, A.


Book ID
119778241
Publisher
IEEE
Year
1997
Tongue
English
Weight
290 KB
Volume
16
Category
Article
ISSN
0278-0070

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Static test compaction for IDDQ testing
โœ Yoshinobu Higami; Kewal K. Saluja; Yuzo Takamatsu; Kozo Kinoshita ๐Ÿ“‚ Article ๐Ÿ“… 2000 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 335 KB ๐Ÿ‘ 2 views

This paper presents a static test compaction method for IDDQ testing of sequential circuits. Test compaction reduces test application time and tester memory and consequently reduces testing cost. Particularly for IDDQ testing, measurement of IDDQ is time-consuming, and thus test compaction is a very