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BiCMOS circuit technology for a high-speed SRAM

โœ Scribed by Douseki, T.; Ohmori, Y.

Book ID
119773890
Publisher
IEEE
Year
1988
Tongue
English
Weight
506 KB
Volume
23
Category
Article
ISSN
0018-9200

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This paper describes a high-speed and low-power 1-Mbit BiCMOS cache SRAM sense circuit fabricated using a 0.5-mm BiCMOS process technology. By using the quasi-6 module structure, switching between 18-and 36-bit output can be carried out without access delay. Because of the development of a sense cir