In this article, a generic VLSI architecture which is both a switch network to implement two block-matching motion estiprogrammable and scalable is proposed for block-matching motion mation algorithms: namely, full-search and three-step search, estimation algorithms. Various motion estimation algori
Architectural Study of a Block-Recursive Motion Estimation Algorithm
✍ Scribed by François Charot; Claude Labit; Pascal Lemonnier
- Publisher
- Elsevier Science
- Year
- 1997
- Tongue
- English
- Weight
- 229 KB
- Volume
- 3
- Category
- Article
- ISSN
- 1077-2014
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✦ Synopsis
Architectural Study of a Block-Recursive Motion Estimation Algorithm
he block-recursive algorithm for motion estimation is an option to classical methods like blockmatching usually used in conventional coding schemes based on motion compensation. The Tbl ock-recursive algorithm considered in this study has been developed at IRISA in the Temis group. It is composed of three steps: estimation, deterministic relaxation, and quadtree region splitting. These steps are iteratively executed until convergence.
To be fully exploitable, a specialized VLSI architecture for motion estimation must satisfy the following features: real-time performance, modularity, easy external interfacing, flexibility and reduced internal complexity. In this paper, we analyse these different features with regards to the numerous parameters of the considered block-recursive algorithm. The influence of parameters on the quality of the coding algorithm is measured through numerous simulations. Architectural mechanisms required for an efficient implementation are also presented and discussed. This study falls within the framework for derivation of a specialized parallel architecture from the initial sequential algorithm specification.
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