✦ LIBER ✦

An efficient CMOS power-combining technique with differential and single-ended power amplifier

✍ Scribed by Eunil Cho; Yonghoon Song; Sungho Lee; Joontae Park; Sangwook Nam

Book ID: 102949523
Publisher: John Wiley and Sons
Year: 2010
Tongue: English
Weight: 662 KB
Volume: 52
Category: Article
ISSN: 0895-2477
DOI: 10.1002/mop.25460

No coin nor oath required. For personal study only.

✦ Synopsis

Abstract

This article proposes an efficient power‐combining architecture with differential and single‐ended power amplifiers (PAs) in a CMOS process. The single‐ended amplifier is added for overall efficiency enhancement. To demonstrate this concept, a CMOS PA using the proposed architecture was fabricated with a 0.13‐μm CMOS technology that delivers 30.6 dBm of output power with 42% drain efficiency and 38% power‐added efficiency at 1.95 GHz. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52:2214–2217, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25460

📜 SIMILAR VOLUMES

Integrated CMOS RF transmitter with a si

Integrated CMOS RF transmitter with a single-ended power amplifier

✍ Oh, Junhee; Kim, Hyungchul; Kim, Min-su; Han, Suyeon; Ham, Junghyun; Seo, Minche 📂 Article 📅 2012 🏛 John Wiley and Sons 🌐 English ⚖ 711 KB

An experimental load matching technique

An experimental load matching technique for RF CMOS power amplifier

✍ YunSeong Eo; Seung-Joon Lee; Dong-Hyun Baek 📂 Article 📅 2008 🏛 John Wiley and Sons 🌐 English ⚖ 252 KB

## Abstract A load matching method for CMOS PA (power amplifier) design is proposed. The contours for RF power and efficiency can be drawn while considering external L and C as tunable X and Y variables. On the basis of the existence of this contour, the realization of load matching of CMOS PA is e

FET power combining with the use of the

FET power combining with the use of the balanced single-ended dual-fed distributed amplifier approach

✍ K. W. Eccleston; O. Kyaw 📂 Article 📅 2002 🏛 John Wiley and Sons 🌐 English ⚖ 133 KB

## Abstract A balanced amplifier employing two identical single‐ended dual‐fed distributed amplifiers is demonstrated to be a viable approach for combining FET output power. The FETs are spaced 180° to ensure all FETs have identical load lines, which are chosen optimally. The configuration uses all

High gain and high efficiency CMOS power

High gain and high efficiency CMOS power amplifier using multiple design techniques

✍ Kim, K.-J.; Lim, T.; Ahn, K.H.; Yu, J.-W. 📂 Article 📅 2011 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 194 KB

[IEEE SOUTHEASTCON 2012 - Orlando, FL, U

[IEEE SOUTHEASTCON 2012 - Orlando, FL, USA (2012.03.15-2012.03.18)] 2012 Proceedings of IEEE Southeastcon - An integrated CMOS high power amplifier using power combining technique

✍ Yiheng Wang, ; Jiann-Shiun Yuan, 📂 Article 📅 2012 🏛 IEEE ⚖ 402 KB

An efficient combination of digital pred

An efficient combination of digital predistortion and OFDM clipping for power amplifiers

✍ Pere L. Gilabert; Michael E. Gadringer; Gabriel Montoro; Markus L. Mayer; Daniel 📂 Article 📅 2009 🏛 John Wiley and Sons 🌐 English ⚖ 478 KB

This article presents a strategy for enhancing efficiency in power amplifiers (PAs) by combining digital predistortion (DPD) linearization and clipping strategies for orthogonal frequency division multiplexing signals in a WiMAX scenario. On the one hand, by reducing the peak-to-average power ratio