✦ LIBER ✦

An 8-bit 40 MS/s Pipeline A/D Converter for WCDMA Testbed

✍ Scribed by Lauri Sumanen; Mikko Waltari; Kari Halonen

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 10-bit 200-MS/s CMOS parallel pipeline

✍ Sumanen, L.; Waltari, M.; Halonen, K.A.I. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 176 KB

A 600-MS/s 5-bit pipeline A/D converter

✍ Varzaghani, A.; Yang, C.-K.K. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 715 KB

A 1.8-V 11-bit 40-MS/s 21-mW pipelined A

✍ Mingjun Fan; Junyan Ren; Ning Li; Fan Ye; Jun Xu 📂 Article 📅 2010 🏛 Springer 🌐 English ⚖ 841 KB

A power-efficient 10-bit 40-MS/s sub-sam

✍ Guanghua Shu; Yao Guo; Junyan Ren; Mingjun Fan; Fan Ye 📂 Article 📅 2011 🏛 Springer 🌐 English ⚖ 767 KB

A Double Sampling 8-Bit, 50 MS/s, 32 mW

✍ Tapani Tuikkanen; Arto Kivi; Timo Rahkonen 📂 Article 📅 2002 🏛 Springer 🌐 English ⚖ 256 KB

Correction to “A 15-Bit 40-MS/s CMOS Pip

✍ Liu, H.-C.; Lee, Z.-M.; Wu, J.-T. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 34 KB