A Study of n-MOS Natural Transistor for Pass Transistor Logic
β Scribed by Srivastava, A.
- Book ID
- 105382760
- Publisher
- John Wiley and Sons
- Year
- 1991
- Tongue
- English
- Weight
- 207 KB
- Volume
- 126
- Category
- Article
- ISSN
- 0031-8965
No coin nor oath required. For personal study only.
π SIMILAR VOLUMES
## Using a physical model to represent the response of a MOS transistor, observations of the output voltage of a two-transitor inverter circuit are generated. The simulated observations are used to assetable a data base from which a statistical model for the inverter is constructed. This statist
Performance evaluation of a two-level carry-skip adder using complementary pass-transistor logic (CPL) is presented in this paper. The adder is compared with a fulI-CMOS version of the two-level carry-skip architecture, with a carry-lookahead adder automatically generated with ALLIANCE CAD tools and