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A loadless CMOS four-transistor SRAM cell in a 0.18-μm logic technology

✍ Scribed by Noda, K.; Matsui, K.; Takeda, K.; Nakamura, N.

Book ID: 114538971
Publisher: IEEE
Year: 2001
Tongue: English
Weight: 134 KB
Volume: 48
Category: Article
ISSN: 0018-9383
DOI: 10.1109/16.974716

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