✦ LIBER ✦

A CAD-system for GaAs VHSIC design: H.B. Lunden, A. Altmae, M. Snellman (Inst. of Microwave Technol., Stockholm, Sweden) 12th Nordic Semicondustor Meeting. Proceedings, Jevnaker, Norway, 8–11 June 1986 (Oslo, Norway: Center Ind. Res. 1986) pp. 187-90

Book ID: 104157549
Publisher: Elsevier Science
Year: 1987
Tongue: English
Weight: 92 KB
Volume: 18
Category: Article
ISSN: 0026-2692
DOI: 10.1016/s0026-2692(87)80393-2

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✦ Synopsis

4 SPICE MOS level 3 is shown to give a good current fit with measured NMOS and PMOS transistor curves. Mean squares of relative current errors (A/RMS) around 2% are achievable using extracted circuit parameters at VBs = 0 V. However, relative conductance errors (AGe~ls) become large if only the current error is minimised. To overcome this problem the authors have developed an advanced curve fitting program ESTIM that weighs the conductance error, too. Typical errors

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SPICE MOS level 3 is shown to give a good current fit with measured NMOS and PMOS transistor curves. Mean squares of relative current errors (A/RMS) around 2% are achievable using extracted circuit parameters at VBs = 0 V. However, relative conductance errors (AGe~ls) become large if only the curren