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A 6-ns 4-Mb CMOS SRAM with offset-voltage-insensitive current sense amplifiers

✍ Scribed by Ishibashi, K.; Takasugi, K.; Komiyaji, K.; Toyoshima, H.; Yamanaka, T.; Fukami, A.; Hashimoto, N.; Ohki, N.; Shimizu, A.; Hashimoto, T.; Nagano, T.; Nishida, T.

Book ID: 119774317
Publisher: IEEE
Year: 1995
Tongue: English
Weight: 701 KB
Volume: 30
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.375969

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