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A 30-ns 256-Mb DRAM with a multidivided array structure

✍ Scribed by Sugibayashi, T.; Takeshima, T.; Naritake, I.; Matano, T.; Takada, H.; Aimoto, Y.; Furuta, K.; Fujita, M.; Saeki, T.; Sugawara, H.; Murotani, T.; Kasai, N.; Shibahara, K.; Nakajima, K.; Hada, H.; Hamada, T.; Aizaki, N.; Kunio, T.; Kakehashi, E.; Masumori, K.; Tanigawa, T.

Book ID: 119773873
Publisher: IEEE
Year: 1993
Tongue: English
Weight: 760 KB
Volume: 28
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.245587

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