620 Mbit/s high-speed switching equipment design

✍ Scribed by Kazuhiro Hiraide; Kenjiro Murakami; Yoshihiro Otsuka

• Publisher: John Wiley and Sons
• Year: 1992
• Tongue: English
• Weight: 879 KB
• Volume: 75
• Category: Article
• ISSN: 8756-6621
• DOI: 10.1002/ecja.4410750601

✦ Synopsis

Abstract

This paper considers the design method to realize the high‐speed switching equipment at the level of 600 Mbit/s, which can switch the PCM‐coded NTSC and HDTV signals. In the switching of the high‐speed signals at the level of 600 Mbit/s, the equipment must be designed at the level close to the performance limit of the devices and implementation, which are generally available at the present stage.

A method is provided which can estimate the upper limit of the switching equipment performance at the stage of design by relating the performance of the devices. More precisely, the single‐stage space‐division switch is analyzed, and it is shown that the 620‐Mbit/s switching equipment can be realized by applying ECL with the transmission delay of some 0.4 ns and providing the retiming for each board. The feasibility is demonstrated by an experimental setup and the usefulness of the proposed method is indicated. By the proposed method, it is also possible to estimate the number of parallel bits, when the parallel switching is planned using low‐speed components. The maximum operating speed is discussed also for the switching using retiming methods.