𝔖 Scriptorium
✦   LIBER   ✦
πŸ“

3D Integration in VLSI Circuits: Implementation Technologies and Applications

✍ Scribed by Katsuyuki Sakuma

Publisher
CRC Press/Taylor & Francis Group
Year
2018
Tongue
English
Leaves
235
Series
Devices, Circuits, and Systems
Edition
1
Category
Library
⬇  Acquire This Volume

No coin nor oath required. For personal study only.

✦ Synopsis

Currently, the term 3D integration includes a wide variety of different integration methods, such as 2.5-dimensional (2.5D) interposer-based integration, 3D integrated circuits (3D ICs), 3D systems-in-package (SiP), 3D heterogeneous integration, and monolithic 3D ICs. The goal of this book is to provide readers with an understanding of the latest challenges and issues in 3D integration. TSVs are not the only technology element needed for 3D integration. There are numerous other key enabling technologies required for 3D integration and the speed of the development in this emerging field is very rapid. To provide readers with state-of-the-art information on 3D integration research and technology developments, each chapter has been contributed by some of the world’s leading scientists and experts from academia, research institutes, and industry from around the globe.

✦ Table of Contents

Content: 3D Integration: Technology and Design / P. Franzon --
3D SiP for ASIC and 3D DRAM Integration / L. Li --
A New Class of High-capacity, Resource-rich FPGAs Enabled by 3D-IC Stacked Silicon Interconnect Technology (SSIT) / S. Ramalingam, Henley Liu, Myongseob Kim, Boon Ang, Woon-Seong Kwon, Tom Lee, Susan Wu, Jonathan Chang, Ephrem Wu, Xin Wu, and Liam Madden --
Challenges in 3D / M. Koyanagi, T. Fukushima, and T. Tanaka --
Wafer-Level Three-Dimensional Integration (3DI) using Bumpless Interconnects and Ultra-Thinning / T. Ohba --
3DI stacking technologies for high volume manufacturing by use of wafer level oxide bonding integration / S. Skordas, K. Sakuma, K. Winstel, and C. Kothandaraman --
Toward 3D high density / S. Cheramy, A. Jouve, C. Fenouillet-Beranger, P. Vivet, and L. Di Cioccio --
Novel Platforms and Applications Using 3D and Heterogeneous Integration Technologies / K-N. Chen, Ting-Yang Yu, Yu-Chen Hu, Cheng-Hsien Lu.

✦ Subjects

Three-dimensional integrated circuits.;Integrated circuits -- Very large scale integration.;TECHNOLOGY & ENGINEERING / Mechanical;Computer engineering.;Electronics.

πŸ“œ SIMILAR VOLUMES

Handbook of 3D Integration: Technology a
πŸ“ Handbook of 3D Integration: Technology and Applications of 3D Integrated Circuits
✍ Philip Garrou, Christopher Bower, Peter Ramm πŸ“‚ Library πŸ“… 2008 πŸ› Wiley-VCH 🌐 English

The first encompassing treatise of this new, but very important field puts the known physical limitations for classic 2D electronics into perspective with the requirements for further electronics developments and market necessities. This two-volume handbook presents 3D solutions to the feature densi

Routing Congestion in VLSI Circuits: Est
πŸ“ Routing Congestion in VLSI Circuits: Estimation and Optimization (Integrated Circuits and Systems)
✍ Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar πŸ“‚ Library πŸ“… 2007 πŸ› Springer 🌐 English

<span>With dramatic increases in on-chip packing densities, routing congestion has become a major problem in integrated circuit design, impacting convergence, performance, and yield, and complicating the synthesis of critical interc- nects. The problem is especially acute as interconnects are becomi

Nanoscale VLSI: Devices, Circuits and Ap
πŸ“ Nanoscale VLSI: Devices, Circuits and Applications
✍ Rohit Dhiman, Rajeevan Chandel πŸ“‚ Library πŸ“… 2020 πŸ› Springer Singapore;Springer 🌐 English

<p>This book describes methodologies in the design of VLSI devices, circuits and their applications at nanoscale levels. The book begins with the discussion on the dominant role of power dissipation in highly scaled devices.The 15 Chapters of the book are classified under four sections that cover de

Routing Congestion in VLSI Circuits: Est
πŸ“ Routing Congestion in VLSI Circuits: Estimation and Optimization (Series on Integrated Circuits and Systems)
✍ Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar πŸ“‚ Library πŸ“… 2007 πŸ› Springer 🌐 English

This volume provides a complete understanding of the fundamental causes of routing congestion in present-day and next-generation VLSI circuits, offers techniques for estimating and relieving congestion, and provides a critical analysis of the accuracy and effectiveness of these techniques. The book