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120-ns 128 K8-bit/64 K16-bit CMOS EEPROMs

✍ Scribed by Terada, Y.; Kobayashi, K.; Nakayama, T.; Hayashikoshi, M.; Miyawaki, Y.; Ajika, N.; Arima, H.; Matsukawa, T.; Yoshihara, T.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 16 ns 2Kx8 bit full CMOS SRAM

✍ Okazaki, N.; Komatsu, T.; Hoshi, N.; Tsuboi, K.; Shimada, T. 📂 Article 📅 1984 🏛 IEEE 🌐 English ⚖ 821 KB

A 150 ns 16-Mb CMOS SRAM with interdigit

✍ Matsumiya, M.; Kawashima, S.; Sakata, M.; Ookura, M.; Miyabo, T.; Koga, T.; Itab 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 870 KB

A 5-ns 32 K ×8/×9 bi-CMOS TTL SRAM with

✍ Shigeki Ohbayashi; Toru Shiomi; Ryuichi Matsuo; Tadashi Sumi; Hiroki Honda; Yosh 📂 Article 📅 1994 🏛 John Wiley and Sons 🌐 English ⚖ 843 KB

120-ns 128 K*8-bit/64 K*16-bit CMOS EEPROMs