๐”– Bobbio Scriptorium
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VLSI Signal Processing: a Bit-Serial Approach

โœ Scribed by Lawson, S.


Book ID
118681032
Publisher
The Institution of Electrical Engineers
Year
1986
Weight
212 KB
Volume
32
Category
Article
ISSN
0013-5127

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A dynamically reconfigurable bit-serial systolic array implemented in 1.2-ยตm double-metal P-well CMOS is described. This processor array is proposed as the central computational unit in the Reconfigurable Systolic Array (RSA) neuro-computer and performance estimates suggest that a 64 IC system (cont