A low power dissipation architecture of
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Yoshitaka Tsunekawa; Michiru Iwawaki; Mamoru Miura
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Article
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2000
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John Wiley and Sons
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English
โ 322 KB
๐ 2 views
In this paper, a low power dissipation architecture of high-performance multiprocessor is proposed for statespace digital filters using block-state realization in order to realize high-accuracy, high-speed process with reduced hardware previously proposed by the authors. Distributed arithmetic is ap