Verification Techniques for System-Level Design
โ Scribed by Masahiro Fujita, Indradeep Ghosh, Mukul Prasad
- Publisher
- Morgan Kaufmann
- Year
- 2007
- Tongue
- English
- Leaves
- 251
- Series
- Systems on Silicon
- Category
- Library
No coin nor oath required. For personal study only.
๐ SIMILAR VOLUMES
Given the growing size and heterogeneity of Systems on Chip (SOC), the design process from initial specification to chip fabrication has become increasingly complex. This growing complexity provides incentive for designers to use high-level languages such as C, SystemC, and SystemVerilog for system-
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System-Level Design Techniques for Energy-Efficient Embedded Systems addresses the development and validation of co-synthesis techniques that allow an effective design of embedded systems with low energy dissipation. The book provides an overview of a system-level co-design flow, illustrating throug