Ultra-Low Power Radiation Hardened by Design Memory Circuits

Design concept for radiation hardening o

Design concept for radiation hardening of low power and low voltage dynamic memories

✍ Schleifer, H.; Ropp, T.v.d.; Hoffmann, K.; Reczek, W. 📂 Article 📅 1995 🏛 IEEE 🌐 English ⚖ 343 KB

Ultra Low-Power Integrated Circuit Desig

Ultra Low-Power Integrated Circuit Design for Wireless Neural Interfaces || A Low-Power Low-Noise Open-loop Amplifier for Neural Recording

✍ Holleman, Jeremy; Zhang, Fan; Otis, Brian 📂 Article 📅 2010 🏛 Springer New York 🌐 English ⚖ 457 KB

This book will describe ultra low-power, integrated circuits and systems designed for the emerging field of neural signal recording and processing, and wireless communication. Since neural interfaces are typically implanted, their operation is highly energy-constrained. This book introduces concepts

Ultra Low-Power Integrated Circuit Desig

Ultra Low-Power Integrated Circuit Design for Wireless Neural Interfaces || Closed-loop Neural Recording Amplifier Design Techniques

✍ Holleman, Jeremy; Zhang, Fan; Otis, Brian 📂 Article 📅 2010 🏛 Springer New York 🌐 English ⚖ 391 KB

This book will describe ultra low-power, integrated circuits and systems designed for the emerging field of neural signal recording and processing, and wireless communication. Since neural interfaces are typically implanted, their operation is highly energy-constrained. This book introduces concepts

Low Voltage and Low Power Divide-By-2/3

Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique

✍ Yin-Tsung Hwang; Jin-Fa Lin 📂 Article 📅 2012 🏛 IEEE 🌐 English ⚖ 811 KB

Design of a low noise, low power consump

Design of a low noise, low power consumption CMOS preamplifier shaper for readout of microstrip detectors in the DMILL radiation hardened process and irradiation measurements

✍ Y Hu; J.D Berst; W Dulinski 📂 Article 📅 1996 🏛 Elsevier Science 🌐 English ⚖ 337 KB

Novel Co-Design of NAND Flash Memory and

Novel Co-Design of NAND Flash Memory and NAND Flash Controller Circuits for Sub-30 nm Low-Power High-Speed Solid-State Drives (SSD)

✍ Takeuchi, K. 📂 Article 📅 2009 🏛 IEEE 🌐 English ⚖ 546 KB