Transient testing of logic networks
β Scribed by A.A Kaposi; D.R Holmes
- Publisher
- Elsevier Science
- Year
- 1971
- Tongue
- English
- Weight
- 493 KB
- Volume
- 3
- Category
- Article
- ISSN
- 0010-4485
No coin nor oath required. For personal study only.
β¦ Synopsis
Transient testing of logic networks
A package of logic network analysis programs has been developed at the Kingston Polytechnic in the past two years.
The initial stage of this work, concerning the testing of combinational networks in steady-state conditions, and an intermediate stage, concerning the analysis of sequential networks have been described previously.
This paper outlines the methods used to test the performance of logical networks under transient conditions. The detection, of possible transient errors is especially necessary in sequential networks which frequently staticise such errors, causing permanent mal-functioning. The program described provides means of detecting and classifying staticised errors in sequential networks and locating the source of transient errors in combinational and sequential networks.
π SIMILAR VOLUMES
In this paper we propose the analytical solution of switching transients for SCFL logic gates. The analysis of an SCFL logic gate is carried out without linearization and can be brought back to multiple analyses of a basic cell, given by a di erential pair with switching input voltages and a variabl