Low-voltage, high-speed CMOS analog latc
β
Hugues J. Achigui; Christian Fayomi; Daniel Massicotte; Mounir Boukadoum
π
Article
π
2011
π
Elsevier Science
π
English
β 573 KB
The design and characterization of a low-voltage, high-speed CMOS analog latched voltage comparator based on the flipped voltage follower (FVF) cell and input signal regeneration is presented. The proposed circuit consists of a differential input stage with a common-mode signal detector, followed by