Testing of Interposer-Based 2.5D Integrated Circuits

✍ Scribed by Ran Wang and Krishnendu Chakrabarty

• Publisher: Springer
• Year: 2017
• Tongue: English
• Leaves: 192
• Category: Library

✦ Synopsis

This book provides readers with an insightful guide to the design, testing and optimization of 2.5D integrated circuits. The authors describe a set of design-for-test methods to address various challenges posed by the new generation of 2.5D ICs, including pre-bond testing of the silicon interposer, at-speed interconnect testing, built-in self-test architecture, extest scheduling, and a programmable method for low-power scan shift in SoC dies. This book covers many testing techniques that have already been used in mainstream semiconductor companies. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 2.5D ICs a reality and commercially viable.

✦ Table of Contents

Front Matter....Pages i-xiv
Introduction....Pages 1-15
Pre-bond Testing of the Silicon Interposer....Pages 17-48
Post-bond Scan-Based Testing of Interposer Interconnects....Pages 49-80
Test Architecture and Test-Path Scheduling....Pages 81-108
Built-In Self-Test....Pages 109-133
ExTest Scheduling and Optimization....Pages 135-162
A Programmable Method for Low-Power Scan Shift in SoC Dies....Pages 163-178
Conclusions....Pages 179-182