𝔖 Bobbio Scriptorium

✦ LIBER ✦

Testing Address Decoder Faults in Two-Port Memories: Fault Models, Tests, Consequences of Port Restrictions, and Test Strategy

✍ Scribed by Said Hamdioui; Ad J. Van De Goor

Book ID: 110262001
Publisher: Springer US
Year: 2000
Tongue: English
Weight: 131 KB
Volume: 16
Category: Article
ISSN: 0923-8174
DOI: 10.1023/a:1008320716847

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE Comput. Soc. Press IEEE Internatio

[IEEE Comput. Soc. Press IEEE International Workshop on Memory Technology, Design, and Test - San Jose, CA, USA (8-9 Aug. 1994)] Proceedings of IEEE International Workshop on Memory Technology, Design, and Test - GOS defects in SRAM: fault modeling and testing possibilities

✍ Segura, J.A.; Rubio, A. 📂 Article 📅 1994 🏛 IEEE Comput. Soc. Press ⚖ 444 KB