System Specification and Design Languages: Selected Contributions from FDL 2010

✍ Scribed by Sacha Loitz, Markus Wedler, Dominik Stoffel (auth.), Tom J. Kaźmierski, Adam Morawiec (eds.)

• Publisher: Springer-Verlag New York
• Year: 2012
• Tongue: English
• Leaves: 260
• Series: Lecture Notes in Electrical Engineering 106
• Edition: 1
• Category: Library

✦ Synopsis

This book brings together a selection of the best papers from the thirteenth edition of the Forum on specification and Design Languages Conference (FDL), which was held in Southampton, UK in September 2010. FDL is a well established international forum devoted to dissemination of research results, practical experiences and new ideas in the application of specification, design and verification languages to the design, modelling and verification of integrated circuits, complex hardware/software embedded systems, and mixed-technology systems.

✦ Table of Contents

Front Matter....Pages i-xii
Formal Hardware/Software Co-verification of Application Specific Instruction Set Processors....Pages 1-20
Evaluating Debugging Algorithms from a Qualitative Perspective....Pages 21-36
Mapping of Concurrent Object-Oriented Models to Extended Real-Time Task Networks....Pages 37-53
SystemC-A Modelling of Mixed-Technology Systems with Distributed Behaviour....Pages 55-69
A Framework for Interactive Refinement of Mixed HW/SW/Analog Systems....Pages 71-89
Bottom-up Verification for CMOS Photonic Linear Heterogeneous System....Pages 91-104
Towards Abstract Analysis Techniques for Range Based System Simulations....Pages 105-121
Modeling Time-Triggered Architecture Based Real-Time Systems Using SystemC....Pages 123-141
Towards the Development of a Set of Transaction Level Models A Feature-Oriented Approach....Pages 143-156
Rapid Prototyping of Complex HW/SW Systems using a Timing and Power Aware ESL Framework....Pages 157-173
Towards Accurate Source-Level Annotation of Low-Level Properties Obtained from Optimized Binary Code....Pages 175-190
Architecture Specifications in CλaSH....Pages 191-206
SyReC: A Programming Language for Synthesis of Reversible Circuits....Pages 207-222
Logical Time @ Work: Capturing Data Dependencies and Platform Constraints....Pages 223-238
Formal Support for Untimed MARTE-SystemC Interoperability....Pages 239-254

✦ Subjects

Circuits and Systems; Electronics and Microelectronics, Instrumentation; Processor Architectures