Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling

✍ Scribed by Vassilios V. Dimakopoulos (auth.), Massimo Torquati, Koen Bertels, Sven Karlsson, François Pacull (eds.)

Publisher: Springer-Verlag New York
Year: 2014
Tongue: English
Leaves: 194
Edition: 1
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

✦ Table of Contents

Front Matter....Pages i-xiii
Introduction....Pages 1-13
Clock Distribution for Fast Networks-on-Chip....Pages 15-66
Fast Network-on-Chip Design....Pages 67-127
Fast On-Chip Data Transfer Using Sinusoid Signals....Pages 129-137
Conclusion and Future Work....Pages 139-140
Back Matter....Pages 141-143

✦ Subjects

Circuits and Systems; Processor Architectures; Electronics and Microelectronics, Instrumentation

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