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Signal integrity characterization of high-speed DDR interface

โœ Scribed by Kato, T. ;Yamamoto, S. ;Sudo, T. ;Ono, Y. ;Takahashi, E. ;Yamada, T.

Book ID
111964648
Publisher
IEEE
Year
2011
Weight
1017 KB
Series
undefined series for scimag
Category
Article

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## Abstract In this article, the design and implementation of a highโ€speed digital system including two daughter boards and a backplane are described, where the emphasis is focused on the systematic analysis of the signal integrity performance using full wave electromagnetic methods combined with c