Shallow source-drain structures for VLSI
โ
AL Butler; DJ Foster
๐
Article
๐
1985
๐
Elsevier Science
โ 220 KB
This paper proposes an improved CMOS source-drain technique which employs amorphising silicon implants prior to dopant implantation to eliminate ion channelling and platinum silicidation to substantially reduce sheet resistance. Counterdoping of the p+ regions by high concentration arsenic implantat