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Shallow junction source/drain regions in CMOS/VLSI technologies

โœ Scribed by K.J. Yallup; D.J. Godfrey


Publisher
Elsevier Science
Year
1985
Weight
341 KB
Volume
129
Category
Article
ISSN
0378-4363

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๐Ÿ“œ SIMILAR VOLUMES


Shallow source-drain structures for VLSI
โœ AL Butler; DJ Foster ๐Ÿ“‚ Article ๐Ÿ“… 1985 ๐Ÿ› Elsevier Science โš– 220 KB

This paper proposes an improved CMOS source-drain technique which employs amorphising silicon implants prior to dopant implantation to eliminate ion channelling and platinum silicidation to substantially reduce sheet resistance. Counterdoping of the p+ regions by high concentration arsenic implantat