<p><p>This book is dedicated to new mathematical instruments assigned for logical modeling of the memory of digital devices. The case in point is logic-dynamical operation named venjunction and venjunctive function as well as sequention and sequentional function. Venjunction and sequention operate w
Sequential Logic Testing and Verification
β Scribed by Abhijit Ghosh, Srinivas Devadas, A. Richard Newton (auth.)
- Publisher
- Springer US
- Year
- 1992
- Tongue
- English
- Leaves
- 223
- Series
- The Springer International Series in Engineering and Computer Science 163
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
In order to design and build computers that achieve and sustain high performance, it is essential that reliability issues be considered careΒ fully. The problem has several aspects. Certainly, considering reliability implies that an engineer must be able to analyze how design decisions affect the incidence of failure. For instance, in order design reliable inteΒ gritted circuits, it is necessary to analyze how decisions regarding design rules affect the yield, i.e., the percentage of functional chips obtained by the manufacturing process. Of equal importance in producing reliable computers is the detection of failures in its Very Large Scale Integrated (VLSI) circuit components, caused by errors in the design specification, implementation, or manufacturing processes. Design verification involves the checking of the specification of a design for correctness prior to carrying out an implementation. Implementation verification ensures that the manual design or automatic synthesis process is correct, i.e., the mask-level description correctly implements the specification. Manufacture test involves the checking of the complex fabrication process for correctness, i.e., ensuring that there are no manufacturing defects in the integrated circuit. It should be noted that all the above verification mechanisms deal not only with verifying the functionality of the integrated circuit but also its performance.
β¦ Table of Contents
Front Matter....Pages i-xix
Introduction....Pages 1-10
Sequential Test Generation....Pages 11-55
Test Generation Using RTL Descriptions....Pages 57-95
Sequential Synthesis for Testability....Pages 97-121
Verification of Sequential Circuits....Pages 123-151
Symbolic FSM Traversal Methods....Pages 153-193
Conclusions....Pages 195-198
Back Matter....Pages 199-214
β¦ Subjects
Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design
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